To provide more information in the form of voice, video, and data at real-time rates, higher bandwidth and more computing power network systems are needed. To meet with increasing demand in computing powers and higher bandwidth network systems, various parallel processing systems have been constructed to meet such demand. A conventional parallel processing system typically employs a group of processing elements or engines to process information such as packets in parallel.
A problem associated with a parallel processing network system is that the processed packets need to be in the same order (or sequence) as the original packets received. Since different processing elements may require different processing time to process the packets, packets exiting the network system may have different sequence from the packets entering the system. The different ordering or sequence of packets can cause problems such as loss of audio signals or pixels in a picture.
A conventional approach to resolve the packet ordering problem associated with parallel processing is to force a fixed latency for each packet in a processing engine (“PE”) for packet processing. In order to ensure packet sequence or ordering, the packet remains in the PE's pipe until it is scheduled (as per sequence) to leave the PE after a fixed latency. The problem with this approach is that the PE may be idling while waiting for the processed packet to leave. PE idling wastes valuable computing resources and reduces overall PE performance.